Startup Description:
Startup XORVIS ( pronounced "ZOR-VIS") is building specialized AI Agents for chip design.
Mission of this startup is to enable much leaner silicon teams to ship world-class Chips - Quicker & Better. www.xorvis.ai
CTO Charter & Responsibilities
• Define the technical strategy for a new kind of AI agent architecture — built from first principles, not existing templates. this is not a typical agent implementation.
• Lead pathfinding R&D to overcome core scientific and engineering hurdles (e.g., reasoning efficiency, tool orchestration, knowledge representation, latency, memory constraints, lack of training data, absence of benchmarks).
• Work closely with the CEO to translate market and customer insights into actionable technical priorities.
• Select and manage the tech stack, development environment, and infrastructure for rapid iteration.
• Recruit and mentor exceptional ML engineers and researchers with complementary skills.
• Provide clear technical narratives for investors, highlighting innovation and defensibility.
• Stay at the forefront of AI research, evaluating and adopting new techniques that could give the agent a competitive edge.
• Collaborate with external researchers or advisors when highly specialized expertise is required.
You’re a Great Fit If You have:
• are Humble and values professional relationships, while maintaining a fire-in-the-belly drive for fast-paced work.
• Deep expertise in AI/ML algorithms, agent architectures, reasoning models, composite AI, and multi-agent systems.
• Proficiency in rapid prototyping and experimental validation.
• First-principles thinker with the ability to tackle unsolved technical challenges where no standard solution exists.
• Experience leading small, high-caliber technical teams in early-stage environments, while remaining deeply hands-on in code.
• Strong communication skills — able to translate deep tech concepts for investors, customers, and non-technical stakeholders.
• Bonus: prior patents/publications. Some domain knowledge in EDA or chip design.
